Leader/Manager, ASIC Design Verification Engineering || Verilog, UVM, TestBench, Technical Leadership, Hardware Emulation, SOC || Exp - 15 + years
Cisco Systems is hiring for Leader/Manager, ASIC Design Verification Engineering || Verilog, UVM, TestBench, Technical Leadership, Hardware Emulation, SOC || Exp - 15 + years in Bangalore, India. Manager level. First seen September 18, 2026; open as of November 12, 2026. Jobs taken straight from company career pages — no aggregator in between.
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- Company
- Cisco Systems
- Where
- Bangalore, India
- Level
- Manager
- First seen
- September 18, 2026
- Listed via
- Workday
What the posting says
Your Impact Cisco SiliconOne team is looking for an expert and talented ASIC Engineering Leader. You will have an ASIC design verification background with hands-on experience in System Verilog and UVM methodology with in-depth knowledge of C++, scripting as well as ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products. - Leads ASIC engineering teams to deliver high-performance, high quality and reliable ASICs for Cisco's diverse product platforms. - Leads…
Read more and apply on Cisco Systems' site
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