Destava

Lead RTL Engineer ( Mixed-Signal IPs)

Silicon is hiring for Lead RTL Engineer ( Mixed-Signal IPs) in Hyderabad. Senior level. First seen September 23, 2026; open as of November 12, 2026. Jobs taken straight from company career pages — no aggregator in between.

Save to applyRead more and apply on Silicon's site

With Destava: How well do you fit? · Tailor my résumé · Write a cover letter

Company
Silicon
Where
Hyderabad
Level
Senior
First seen
September 23, 2026
Listed via
Workday

What the posting says

Role Overview The RTL Design Engineer for Mixed-Signal IPs is responsible for developing, integrating, and verifying digital RTL blocks within mixed-signal subsystems that combine analog and digital functionalities. This role requires a deep understanding of digital design principles, interface with analog/mixed-signal teams, and strong verification and integration skills to ensure high-quality, low-power, and functionally robust IP delivery. The engineer will work closely with system architects, analog designers, and SoC teams to enable seamless integration of mixed-signal IPs into complex…

Read more and apply on Silicon's site

This page includes information from the O*NET 31.0 Database by the U.S. Department of Labor, Employment and Training Administration (USDOL/ETA). Used under the CC BY 4.0 license. O*NET® is a trademark of USDOL/ETA.