Destava

Static Timing Analysis Engineer

Silicon is hiring for Static Timing Analysis Engineer in Austin. Mid level. First seen October 23, 2026; open as of November 10, 2026. Jobs taken straight from company career pages — no aggregator in between.

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Company
Silicon
Where
Austin
Level
Mid
First seen
October 23, 2026
Listed via
Workday

What the posting says

Static Timing Analysis Engineer Austin, TX This position involves the development of timing constraints and timing closure signoff of low power Wireless SoCs and IP systems. These SoC devices are multi-core, multi-threaded processor subsystems with multi-level cache, capable of supporting multiple wireless protocols and application functionality, such as sensor hub, AI /ML and are specified to exceed best-in-class power targets. These SoCs deploy a complex, deeply gated clock network with many asynchronous clock sources. Responsibilities - Develop timing constraints at both the IP and SoC…

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