Destava

Analog ASIC Design Engineer

Ranovus is hiring for Analog ASIC Design Engineer in Nürnberg. Mid level. First seen August 6, 2026; open as of November 6, 2026. Jobs taken straight from company career pages — no aggregator in between.

Save to applyRead more and apply on Ranovus' site

With Destava: How well do you fit? · Tailor my résumé · Write a cover letter

Company
Ranovus
Where
Nürnberg
Level
Mid
First seen
August 6, 2026
Listed via
BambooHR

What the posting says

The Opportunity We are seeking Full-Time Senior Analog ASIC Design Engineers to work in the Analog & Mixed Signal IC Design and Integration team. How You’ll Contribute As part of our Analog & Mixed-Signal team, you’ll help design, develop and test advanced electro-optical transceiver chips. Responsibilities • Design very high-speed components like TIAs and Drivers in CMOS • Design auxiliary Low-power, low speed analog and mixed-signal circuits in CMOS (Regulators, OpAmps, Analog Control Loops, Signal Indicators) • Collaboration with the layout team • Supporting Lab characterization and…

Read more and apply on Ranovus' site

This page includes information from the O*NET 31.0 Database by the U.S. Department of Labor, Employment and Training Administration (USDOL/ETA). Used under the CC BY 4.0 license. O*NET® is a trademark of USDOL/ETA.