Destava

FPGA Hardware Design Engineer

pae is hiring for FPGA Hardware Design Engineer in US-MD-Hanover. Mid level, $260k–$340k a year stated. First seen October 29, 2026; open as of November 13, 2026. Jobs taken straight from company career pages — no aggregator in between.

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Company
pae
Where
US-MD-Hanover
Level
Mid
Pay stated
$260k–$340k a year
First seen
October 29, 2026
Listed via
Workday

What the posting says

Our contract supports more than 12 efforts with varying levels of hardware and software development requirements. Our projects are focused on front end equipment configuration/maintenance, back-end repositories, front end dashboards, as well as everything in between for the full data processing thread. Our teams can range from one to two developers to a team of 12. All of our teams work right alongside our customer to discuss requirements, identify solutions, and choose the way forward for implementation. As part of an engineering office, our customer and our workforce look and plan for…

Read more and apply on pae's site

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