Senior Engineer IP Verification - Digital Design Verification
Micron is hiring for Senior Engineer IP Verification - Digital Design Verification in Hyderabad - Phoenix Aquila, India. Senior level. First seen October 13, 2026; open as of November 12, 2026. Jobs taken straight from company career pages — no aggregator in between.
With Destava: How well do you fit? · Tailor my résumé · Write a cover letter
- Company
- Micron
- Where
- Hyderabad - Phoenix Aquila, India
- Level
- Senior
- First seen
- October 13, 2026
- Listed via
- Workday
What the posting says
Responsibilities will include, but are not limited to: - Understand design specifications and define verification scope, strategy, and plans for block/chip RTL verification - Develop, execute, and maintain verification testbenches and test vectors using digital simulation tools and methodologies (SV-UVM) - Run directed and constrained-random tests and regressions; analyze results and triage failures. - Close verification metrics (functional coverage / code coverage as applicable) and identify verification holes to demonstrate readiness toward tapeout - Provide verification support to design…
Read more and apply on Micron's site
More jobs like this
A search agent finds the jobs this list misses: the ones that mean the same without the same words. Have Destava watch for senior engineer ip verification - digital design verification jobs in Hyderabad - Phoenix Aquila, India, new matches every morning on your own account.
This page includes information from the O*NET 31.0 Database by the U.S. Department of Labor, Employment and Training Administration (USDOL/ETA). Used under the CC BY 4.0 license. O*NET® is a trademark of USDOL/ETA.