FPGA Design Engineer
Arista Networks is hiring for FPGA Design Engineer in Santa Clara, CA, United States. Mid level. First seen October 10, 2026; open as of November 9, 2026. Jobs taken straight from company career pages — no aggregator in between.
With Destava: How well do you fit? · Tailor my résumé · Write a cover letter
- Company
- Arista Networks
- Where
- Santa Clara, CA, United States
- Level
- Mid
- First seen
- October 10, 2026
- Listed via
- SmartRecruiters
Read more and apply on Arista Networks' site
More jobs like this
Principal Design Verification Engineer (AI Fabric Switches)
Save to applySr/Staff Digital Design Engineer
Save to applyASIC Packaging SI/PI Engineer (Hybrid)
Save to applyPhysical Design and CAD Engineer
Save to apply
See all 222 Computer Hardware Engineers jobs in San Francisco Bay Area
A search agent finds the jobs this list misses: the ones that mean the same without the same words. Have Destava watch for fpga design engineer jobs in Santa Clara, CA, United States, new matches every morning on your own account.
This page includes information from the O*NET 31.0 Database by the U.S. Department of Labor, Employment and Training Administration (USDOL/ETA). Used under the CC BY 4.0 license. O*NET® is a trademark of USDOL/ETA.