Senior ASIC Design Engineer – Processor Subsystem
E-Space is hiring for Senior ASIC Design Engineer – Processor Subsystem in Saratoga, CA. Senior level. First seen August 6, 2026; open as of November 12, 2026. Jobs taken straight from company career pages — no aggregator in between.
With Destava: How well do you fit? · Tailor my résumé · Write a cover letter
- Company
- E-Space
- Where
- Saratoga, CA
- Level
- Senior
- First seen
- August 6, 2026
- Listed via
- Lever
What the posting says
This role sits at the intersection of RTL design and functional verification, requiring a strong grasp of processor subsystem architecture and hands-on experience bringing together complex IP in a cohesive, validated design. We are looking for dedicated self-starters who thrive in a fast-paced environment, can take ownership of complex technical challenges, and drive them through to completion with minimal oversight. Key Responsibilities: · Configure and integrate Arm processor IP (e.g., Cortex-M series) and associated subsystem components including bus interconnects, memory controllers, and…
Read more and apply on E-Space's site
More jobs like this
Sr. Server Hardware Systems Engineer (Starlink)
Save to applyHardware Board Design Engineer
Save to applyPrincipal Engineer, FPGA Architecture
Save to applyStaff Engineer, Digital ASIC Design — Storage Controllers
Save to apply
See all 467 Computer Hardware Engineers jobs in San Francisco Bay Area
A search agent finds the jobs this list misses: the ones that mean the same without the same words. Have Destava watch for senior asic design engineer – processor subsystem jobs in Saratoga, CA, new matches every morning on your own account.
This page includes information from the O*NET 31.0 Database by the U.S. Department of Labor, Employment and Training Administration (USDOL/ETA). Used under the CC BY 4.0 license. O*NET® is a trademark of USDOL/ETA.