Destava

IC/RTL Design Engineer

Lumilens is hiring for IC/RTL Design Engineer in San Jose. Mid level. First seen August 6, 2026; open as of November 11, 2026. Jobs taken straight from company career pages — no aggregator in between.

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Company
Lumilens
Where
San Jose
Level
Mid
First seen
August 6, 2026
Listed via
Ashby

What the posting says

What you'll do - Develop block-level micro-architecture for your assigned blocks, and contribute to interface and register definitions. - Design and implement front-end RTL blocks in SystemVerilog — datapath elements, the UCIe streaming/RDI adapter, elastic FIFOs, and supporting logic. - Integrate IP and support parameterization for configurability. - Write clean, lint-clean, CDC/RDC-clean RTL that follows the coding and quality standards. - Write block-level testbenches, sanity checks, and assertions (SVA) for your own blocks before handoff to DV. - Power- and timing-aware design — managing…

Read more and apply on Lumilens' site