Destava

Power Integrity Engineer

Etched is hiring for Power Integrity Engineer in San Jose. Mid level. First seen August 6, 2026, posted 2 times; open as of November 12, 2026. Jobs taken straight from company career pages — no aggregator in between.

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Company
Etched
Where
San Jose
Level
Mid
First seen
August 6, 2026
Postings
2
Listed via
Ashby

What the posting says

In this role, you will own the power integrity methodology for high-power PCB and system designs — from early architecture through final release — ensuring robust power delivery to high-performance ASICs and supporting components across all operating conditions. Key Responsibilities - Perform pre- and post-layout PDN analysis for high-current ASIC power rails: target impedance profiling, decoupling capacitor selection and placement optimization, and plane resonance analysis. - Execute DC IR-drop and current density simulations; define copper weight, plane shapes, via stitching, and layer…

Read more and apply on Etched's site

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