Destava

Post-Silicon Validation Engineer

Etched is hiring for Post-Silicon Validation Engineer in San Jose. Mid level. First seen August 6, 2026, posted 2 times; open as of November 10, 2026. Jobs taken straight from company career pages — no aggregator in between.

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Company
Etched
Where
San Jose
Level
Mid
First seen
August 6, 2026
Postings
2
Listed via
Ashby

What the posting says

The ideal candidate will be responsible for bringing up, validating, and characterizing ASICs from first silicon through the production ramp. This role is crucial in ensuring functional correctness, performance, and reliability of our AI/ML accelerator hardware, enabling successful deployment of our cutting-edge products. Key Responsibilities - Drive early bring-up of first silicon, including boot, initialization, and debug of ASICs. - Perform deep-dive debug of silicon issues across RTL, firmware, and system levels. - Collaborate closely with design, verification, and board teams to…

Read more and apply on Etched's site

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