Destava

Physical Design Engineer - Full Chip Implementation

Etched is hiring for Physical Design Engineer - Full Chip Implementation in San Jose. Staff level. First seen August 6, 2026, posted 2 times; open as of November 11, 2026. Jobs taken straight from company career pages — no aggregator in between.

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Company
Etched
Where
San Jose
Level
Staff
First seen
August 6, 2026
Postings
2
Listed via
Ashby

What the posting says

Job Summary Etched is building a new category of AI hardware: frontier inference clusters. As a top-level PD engineer, you will own full-chip implementation—encompassing floorplanning, P&R, clocking, timing analysis, physical verification, and sign-offs—from synthesis through to GDSII completion. You will lead critical efforts in these areas, leveraging our PD flows to drive aggressive PPA optimization and timing closure. You will collaborate closely with RTL designers to provide actionable feedback, ensuring we iterate at unprecedented speeds to bring our products to market. Key…

Read more and apply on Etched's site

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