Design Verification Engineer - Internal IP
Etched is hiring for Design Verification Engineer - Internal IP in Austin. Mid level. First seen November 7, 2026, posted 2 times; open as of November 10, 2026. Jobs taken straight from company career pages — no aggregator in between.
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- Company
- Etched
- Where
- Austin
- Level
- Mid
- First seen
- November 7, 2026
- Postings
- 2
- Listed via
- Ashby
What the posting says
You will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack. Key responsibilities - Develop and maintain UVM/SystemVerilog testbenches for high-performance IPs (compute arrays, DMAs, NoCs, memory subsystems). - Define and execute…
Read more and apply on Etched's site
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