Senior ASIC DFT DV Engineer (Hybrid)
Cisco Systems is hiring for Senior ASIC DFT DV Engineer (Hybrid) in San Jose, California, US. Senior level. First seen October 14, 2026; open as of November 13, 2026. Jobs taken straight from company career pages — no aggregator in between.
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- Company
- Cisco Systems
- Where
- San Jose, California, US
- Level
- Senior
- First seen
- October 14, 2026
- Listed via
- Workday
What the posting says
Your Impact - Responsible for thorough test planning and development of test benches to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening, in-system test, debug and diagnostics needs of the design - Own the MBIST methodology across the Silicon One portfolio, driving unified, high-quality standards for memory testing. - Architect reusable, hierarchical infrastructures that scale across massive designs to accelerate time-to-market for future silicon. - Work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive…
Read more and apply on Cisco Systems' site
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