ASIC Physical Design Engineer
Cisco Systems is hiring for ASIC Physical Design Engineer in San Jose, California, US. Mid level. First seen October 28, 2026; open as of November 12, 2026. Jobs taken straight from company career pages — no aggregator in between.
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- Company
- Cisco Systems
- Where
- San Jose, California, US
- Level
- Mid
- First seen
- October 28, 2026
- Listed via
- Workday
What the posting says
Your Impact As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII implementation flow for advanced semiconductor nodes. You will optimize floor planning and timing, analyze and improve backend design flows, and collaborate across teams to ensure the successful delivery of high-performance networking chips. You will: - Drive RTL-to-GDSII implementation, including hierarchical floorplanning, place and route, static timing analysis, power integrity, and equivalence checks with a focus on performance and die size optimization. - Analyze existing tool flows and…
Read more and apply on Cisco Systems' site
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