Senior DFT Design Engineer
Altera is hiring for Senior DFT Design Engineer in San Jose, California, United States. Senior level. First seen October 14, 2026; open as of November 12, 2026. Jobs taken straight from company career pages — no aggregator in between.
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- Company
- Altera
- Where
- San Jose, California, United States
- Level
- Senior
- First seen
- October 14, 2026
- Listed via
- Workday
What the posting says
The Altera DFT team is looking for a motivated DFT (Design for Testability) Design Engineer to join an industry-leading IC design organization. This is an opportunity to work on cutting-edge technologies including FPGA, processor, DSP, SERDES, IO, 2.5D/3D multi-die packaging, and other advanced solutions that will drive future innovation. As a Senior DFT Design Engineer, you will be responsible for DFT architecture and implementation, including DFT specifications, test logic insertion, test mode timing constraints, ATPG, and pre-silicon validation. You will also contribute to the development…
Read more and apply on Altera's site
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