Destava

Physical Design Engineer

Altera is hiring for Physical Design Engineer in San Jose, California, United States. Mid level. First seen August 12, 2026, posted 3 times; open as of November 13, 2026. Jobs taken straight from company career pages — no aggregator in between.

Save to applyRead more and apply on Altera's site

With Destava: How well do you fit? · Tailor my résumé · Write a cover letter

Company
Altera
Where
San Jose, California, United States
Level
Mid
First seen
August 12, 2026
Postings
3
Listed via
Workday

What the posting says

In this role, you will contribute to the implementation of custom IP and SoC designs from RTL through GDSII, supporting timing closure, power optimization, physical verification, and design signoff for leading-edge semiconductor products. You will work closely with architecture, RTL, DFT, synthesis, verification, and methodology teams to help deliver high-quality silicon for next-generation FPGA technologies. Key Responsibilities - Perform block-level physical design implementation of custom IP and SoC designs from RTL through GDSII, supporting the delivery of manufacturing-ready design…

Read more and apply on Altera's site

This page includes information from the O*NET 31.0 Database by the U.S. Department of Labor, Employment and Training Administration (USDOL/ETA). Used under the CC BY 4.0 license. O*NET® is a trademark of USDOL/ETA.